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Information Journal Paper

Title

AUTOMATED IMPLEMENTATION OF QUANTUM CIRCUITS ON QFPGA FOR EMULATION

Pages

  65-75

Abstract

 This paper defines an optimal architecture for the FPGA using exact methods. In order to achieve this goal, optimal PLACEMENT and ROUTING solutions are found using the integer linear programming techniques. After redefining the internal architecture of the logic blocks, quantum circuits are partitioned by a heuristic algorithm in order to reach maximum utilization of the resources inside logic blocks and minimum delay of the paths traversed by the q-bits in the circuit.Experimental results show that FPGA architecture modifications can result in the reduction of the delay of critical paths of circuits by up to half in some cases and in a considerable reduction of the number of channels used for ROUTING. Furthermore, the results show that defining the logic blocks with 12 q-bits instead of 4 q-bits can decrease circuits delay and the number of used channels to a large extent.

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    Cite

    APA: Copy

    HEIDARZADEH, M., & DANAEE FAR, M.. (2014). AUTOMATED IMPLEMENTATION OF QUANTUM CIRCUITS ON QFPGA FOR EMULATION. NASHRIYYAH -I MUHANDISI -I BARQ VA MUHANDISI -I KAMPYUTAR -I IRAN, B- MUHANDISI -I KAMPYUTAR, 11(2), 65-75. SID. https://sid.ir/paper/228476/en

    Vancouver: Copy

    HEIDARZADEH M., DANAEE FAR M.. AUTOMATED IMPLEMENTATION OF QUANTUM CIRCUITS ON QFPGA FOR EMULATION. NASHRIYYAH -I MUHANDISI -I BARQ VA MUHANDISI -I KAMPYUTAR -I IRAN, B- MUHANDISI -I KAMPYUTAR[Internet]. 2014;11(2):65-75. Available from: https://sid.ir/paper/228476/en

    IEEE: Copy

    M. HEIDARZADEH, and M. DANAEE FAR, “AUTOMATED IMPLEMENTATION OF QUANTUM CIRCUITS ON QFPGA FOR EMULATION,” NASHRIYYAH -I MUHANDISI -I BARQ VA MUHANDISI -I KAMPYUTAR -I IRAN, B- MUHANDISI -I KAMPYUTAR, vol. 11, no. 2, pp. 65–75, 2014, [Online]. Available: https://sid.ir/paper/228476/en

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