DESIGN OF FAULT-TOLERANT BCD ADDERS IN REVERSIBLE LOGIC

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MIRSHEKAR MAHBOOBEH; VALINATAJ MOJTABA; JAZAYERI HAMID

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Journal: ELECTRONIC INDUSTRIES Year:2016 | Volume:6 | Issue:4 Page(s): 51-62

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Information Journal Paper

Title

DESIGN OF FAULT-TOLERANT BCD ADDERS IN REVERSIBLE LOGIC

Author(s)

MIRSHEKAR MAHBOOBEH | VALINATAJ MOJTABA | JAZAYERI HAMID | Issue Writer Certificate

Keywords

REVERSIBLE LOGICQ2

QUANTUM COMPUTINGQ2

FAULT-TOLERANCEQ2

FULL ADDERQ2

BCD ADDERQ2

Abstract

In recent years, reversible circuits have drawn high attention due to their usability in power consumption optimization of low power CMOS circuits in addition to QUANTUM COMPUTING. On the other hand, fault and error tolerance has been one of the vital characteristics of new circuits because of the increasing susceptibility of these circuits against environmental effects. As adder circuits are the main parts of processing and arithmetic circuits, in this paper, we first propose a new gate to design a parity-preserving FULL ADDER, and then, introduce two new fault-tolerant reversible BCD ADDERs. Based on performed comparisons between the proposed structures and the existing gates and adders, the new FULL ADDER and BCD ADDERs are the best or favorable designs according to the number of required gates, hardware complexity, delay and quantum cost.

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APA: Copy

MIRSHEKAR, MAHBOOBEH, VALINATAJ, MOJTABA, & JAZAYERI, HAMID. (2016). DESIGN OF FAULT-TOLERANT BCD ADDERS IN REVERSIBLE LOGIC. ELECTRONIC INDUSTRIES, 6(4), 51-62. SID. https://sid.ir/paper/229571/en

Vancouver: Copy

MIRSHEKAR MAHBOOBEH, VALINATAJ MOJTABA, JAZAYERI HAMID. DESIGN OF FAULT-TOLERANT BCD ADDERS IN REVERSIBLE LOGIC. ELECTRONIC INDUSTRIES[Internet]. 2016;6(4):51-62. Available from: https://sid.ir/paper/229571/en

IEEE: Copy

MAHBOOBEH MIRSHEKAR, MOJTABA VALINATAJ, and HAMID JAZAYERI, “DESIGN OF FAULT-TOLERANT BCD ADDERS IN REVERSIBLE LOGIC,” ELECTRONIC INDUSTRIES, vol. 6, no. 4, pp. 51–62, 2016, [Online]. Available: https://sid.ir/paper/229571/en

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