PRESENTING A FAULT TOLERANT MECHANISM FOR BUFFERING FAULT IN NETWORK ON CHIPS

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LOTFI SADEQ; AFZALI KUSHA ALI; SAFFARI MARZIE

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Journal Paper

Paper Information

Journal: JOURNAL OF ADVANCES IN COMPUTER RESEARCH Year:2014 | Volume:5 | Issue:2 (16) Page(s): 71-80

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Information Journal Paper

Title

PRESENTING A FAULT TOLERANT MECHANISM FOR BUFFERING FAULT IN NETWORK ON CHIPS

Author(s)

LOTFI SADEQ | AFZALI KUSHA ALI | SAFFARI MARZIE | Issue Writer Certificate

Keywords

NETWORK ON CHIP

BUFFERING

VIRTUAL CHANNEL

FAULT TOLERANCE ROUTER

Abstract

As technology scales deep into the nanometer regime, on-chip communication becomes more susceptible to transient noise sources, such as crosstalk, external radiation, and spurious voltage spikes. The NETWORK ON CHIP s modularity and reusability has brought about the use of error control methods to address transient errors in NETWORK ON CHIP links. In this work, we design a FAULT TOLERANCE ROUTER with efficient area and power dissipated. Actually, we exploit the free VIRTUAL CHANNEL to store the redundant data. VIRTUAL CHANNEL is used for deadlock avoidance it can be implement as 2, 4 or 8 channel. The almost time we can find a free channel that we can use in fault tolerance mechanism. We describe the proposed architecture with VHDL and implemented with synopsis compiler design. We use analytical model to evaluate the fault tolerance. The result shows that we improve the dynamic power dissipation, area, and reliability

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APA: Copy

LOTFI, SADEQ, AFZALI KUSHA, ALI, & SAFFARI, MARZIE. (2014). PRESENTING A FAULT TOLERANT MECHANISM FOR BUFFERING FAULT IN NETWORK ON CHIPS. JOURNAL OF ADVANCES IN COMPUTER RESEARCH, 5(2 (16)), 71-80. SID. https://sid.ir/paper/328761/en

Vancouver: Copy

LOTFI SADEQ, AFZALI KUSHA ALI, SAFFARI MARZIE. PRESENTING A FAULT TOLERANT MECHANISM FOR BUFFERING FAULT IN NETWORK ON CHIPS. JOURNAL OF ADVANCES IN COMPUTER RESEARCH[Internet]. 2014;5(2 (16)):71-80. Available from: https://sid.ir/paper/328761/en

IEEE: Copy

SADEQ LOTFI, ALI AFZALI KUSHA, and MARZIE SAFFARI, “PRESENTING A FAULT TOLERANT MECHANISM FOR BUFFERING FAULT IN NETWORK ON CHIPS,” JOURNAL OF ADVANCES IN COMPUTER RESEARCH, vol. 5, no. 2 (16), pp. 71–80, 2014, [Online]. Available: https://sid.ir/paper/328761/en

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