OPTIMIZED STANDARD CELL GENERATION FOR STATIC CMOS TECHNOLOGY

Q: How can I download an article?

To download an article from SID, first log in to the site, search for the article title, and click on the 'Download Article' option.

Q: How can I download an ISI article?

To download an ISI article on SID, enter the keyword or article title in the search bar, view the relevant results, click on the desired article, and select the 'Download Article' option.

Q: How can I access the SID database?

To access the SID database, visit SID.ir, create an account, and log in to access scientific resources.

Q: Is downloading articles from SID free?

Some articles on SID are available for free, while others require payment. Details are specified on the article's page.

SAMAVI S.; TORKIAN A.; KHADIVI P.

مرکز اطلاعات علمی Scientific Information Database (SID) - Trusted Source for Research and Academic Resources

Journal Paper

Paper Information

Journal: ESTEGHLAL Year:2003 | Volume:21 | Issue:2 Page(s): 15-28

Download Full-Text

Persian Verion

View:

957

Download:

Cites:

Information Journal Paper

Title

OPTIMIZED STANDARD CELL GENERATION FOR STATIC CMOS TECHNOLOGY

Author(s)

SAMAVI S. | TORKIAN A. | KHADIVI P. | Issue Writer Certificate

Keywords

VLSIQ4

UEHARA'S METHODQ4

STATIC CMOSQ4

CONTINOUS DIFFUSIONQ4

STANDARD CELLQ4

Abstract

Fabrication of an integrated circuit with smaller area, besides reducing the cost of manufacturing, usually causes a reduction in the power dissipation and propagation delay. Using the STATIC CMOS technology to fabricate a circuit that realizes a specific logic function and occupies a minimum space, it must be implemented with continuous diffusion runs. Therefore, at the destine stage, an Eulerian path should be found for the logic function. Every discontinuity causes an increase in the area as well as a reduction in the clock rate and performance. The realization of a logic function using the STATIC CMOS technology is done through different methods, most of which are based on the UEHARA'S METHOD. In this paper, an algorithm is suggested that finds the Eulerian path and allows the implementation of the circuit with continuity in the diffusion region that results in minimum area. In a case where there is no Eulerian path, the possible sub-paths are found. In addition, the algorithm gives information that helps the layout generation.

Cites

No record.

References

No record.

Cite

APA: Copy

SAMAVI, S., TORKIAN, A., & KHADIVI, P.. (2003). OPTIMIZED STANDARD CELL GENERATION FOR STATIC CMOS TECHNOLOGY. ESTEGHLAL, 21(2), 15-28. SID. https://sid.ir/paper/6086/en

Vancouver: Copy

SAMAVI S., TORKIAN A., KHADIVI P.. OPTIMIZED STANDARD CELL GENERATION FOR STATIC CMOS TECHNOLOGY. ESTEGHLAL[Internet]. 2003;21(2):15-28. Available from: https://sid.ir/paper/6086/en

IEEE: Copy

S. SAMAVI, A. TORKIAN, and P. KHADIVI, “OPTIMIZED STANDARD CELL GENERATION FOR STATIC CMOS TECHNOLOGY,” ESTEGHLAL, vol. 21, no. 2, pp. 15–28, 2003, [Online]. Available: https://sid.ir/paper/6086/en

Related Journal Papers