A COMBINED METHOD TO IMPROVE SEQUENTIAL CIRCUIT TEST GENERATION

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Mohammadkhani Roohollah; Hessabi Shaahin

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Seminar Paper

Paper Information

Seminar: CONFRANCE SALANE ANJOMANE COMPUTER IRAN
Year:2004 | Issue:9

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Title

A COMBINED METHOD TO IMPROVE SEQUENTIAL CIRCUIT TEST GENERATION

Author(s)

Mohammadkhani Roohollah | Hessabi Shaahin

Keywords

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Abstract

THIS PAPER PROPOSES A COMBINED METHOD FOR SEQUENTIAL CIRCUIT TEST GENERATION WHICH EMPLOYS STGBASED AND GA-BASED TEST GENERATION TECHNIQUES. ALMOST ALL PREVIOUS HYBRID TEST GENERATORS USE ALGORITHMIC DECOMPOSITION, BUT THE PROPOSED METHOD USES CIRCUIT DECOMPOSITION. SO THE STG-BASED TECHNIQUES ARE USED TO GENERATE TEST FOR CONTROL UNIT AND TEST GENERATION FOR DATAPATH UNIT IS PERFORMED BY RESORTING TO GA-BASED TECHNIQUES. THE COMBINATION OF THE TWO TECHNIQUES IS EXPECTED TO PROVIDE HIGH FAULT COVERAGES IN A REASONABLE TIME. EXPERIMENTAL RESULTS SHOW THE EFFECTIVENESS OF THE APPROACH.

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APA: Copy

Mohammadkhani, Roohollah, & Hessabi, Shaahin. (2004). A COMBINED METHOD TO IMPROVE SEQUENTIAL CIRCUIT TEST GENERATION. Confrance Salane Anjomane Computer Iran. SID. https://sid.ir/paper/905576/en

Vancouver: Copy

Mohammadkhani Roohollah, Hessabi Shaahin. A COMBINED METHOD TO IMPROVE SEQUENTIAL CIRCUIT TEST GENERATION. 2004. Available from: https://sid.ir/paper/905576/en

IEEE: Copy

Roohollah Mohammadkhani, and Shaahin Hessabi, “A COMBINED METHOD TO IMPROVE SEQUENTIAL CIRCUIT TEST GENERATION,” presented at the Confrance Salane Anjomane Computer Iran. 2004, [Online]. Available: https://sid.ir/paper/905576/en

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