The electrical behavior of neurons can be more complex in the presence of autapse. In the presence of an autaptic connection, the Izhikevich neuron model can show a variety of dynamic behaviors, such as chaotic behavior. This paper presents a novel, high speed and robust pseudo random number generator based on the autaptic Izhikevich neuron oscillator and its FPGA implementation. The autaptic Izhikevich neuron model is simulated and dynamically analyzed. Then, the proposed pseudo-random number generator is modeled and simulated using the Xilinx system generator platform, synthesized using Xilinx Synthesis Tool, and implemented on the XILINX SPARTAN-6 XC6SLX9 FPGA evaluation board. As a post processing operation, the XOR function is used to increase the randomness of the output bit sequences. The FPGA implementation results show that the implementation cost of the proposed pseudo-random number generator is lower than similar works, and the proposed generator achieves a maximum frequency of 63.2 MHz. The NIST test suite is used for testing the quality of the generated bit sequences. The NIST test results indicates the high quality of the generated random bit sequence.