Distributed MOS Transistor Technique to Facilitate Dynamic Element Matching Implementation Capability in Low Power 10–Bit Binary Digital to Analog Converter

Q: How can I download an article?

To download an article from SID, first log in to the site, search for the article title, and click on the 'Download Article' option.

Q: How can I download an ISI article?

To download an ISI article on SID, enter the keyword or article title in the search bar, view the relevant results, click on the desired article, and select the 'Download Article' option.

Q: How can I access the SID database?

To access the SID database, visit SID.ir, create an account, and log in to access scientific resources.

Q: Is downloading articles from SID free?

Some articles on SID are available for free, while others require payment. Details are specified on the article's page.

Mousa Yousefi Mousa Yousefi; Monfaredi Khlil; Yousefi Mousa

مرکز اطلاعات علمی Scientific Information Database (SID) - Trusted Source for Research and Academic Resources

Journal Paper

Paper Information

Journal: JOURNAL OF IRANIAN ASSOCIATION OF ELECTRICAL AND ELECTRONICS ENGINEERS Year:2022 | Volume:19 | Issue:2 Page(s): 21-30

Download Full-Text

Persian Verion

View:

Download:

Cites:

Information Journal Paper

Title

Distributed MOS Transistor Technique to Facilitate Dynamic Element Matching Implementation Capability in Low Power 10–Bit Binary Digital to Analog Converter

Author(s)

Yousefi Mousa Yousefi" target="_blank">Mousa Yousefi Mousa Yousefi | Monfaredi Khlil | Yousefi Mousa | Issue Writer Certificate

Keywords

Digital to analog converter

Dynamic Element Matching

Mismatching transistor

Distributed MOS Transistor.

Abstract

Performance of the current steering Digital to analog converters are limited by transistors channel width and length mismatches and their Threshold and Early voltage variations due to fabrication process errors. Although there are several ways to reduce errors due to element mismatches, however these errors cannot be completely eliminated. In this paper, Distributed MOS Transistor.Technique is utilized which facilitates Dynamic Element Matching implementation capability in Binary Digital to analog converter. The proposed technique reduces the errors due to element mismatches and also load voltage variations needless of high power consumption and complex circuitry. This technique operates based on random selection of unit current blocks among specific number of available current units. To make the generated code as random as possible, a random code generator, full adder and 4*16 decoder have been used. This technique is realized in a 10-bit Digital to analog converter with 180 nm CMOS technology. The LSB current is 500nA and supply voltage is 1.8v and the power consumption of this converter is 14.6 mW and SFDR of DAC is achieved 60.27 dB based on simulation result with Cadence Spectre software.

Multimedia

No record.

Cites

No record.

References

No record.

Cite

Related Journal Papers

No record.

Related Seminar Papers

No record.

Related Plans