Modeling MOSFET Threshold Voltage in TSMC 0.18um CMOS for Integrated Circuits Design

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Ebrahimi Amir; Adarang Habib

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Journal Paper

Paper Information

Journal: Contributions of Science and Technology for Engineering Year:2024 | Volume:1 | Issue:1 Page(s): 1-11

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Title

Modeling MOSFET Threshold Voltage in TSMC 0.18um CMOS for Integrated Circuits Design

Author(s)

Ebrahimi Amir | Adarang Habib | Issue Writer Certificate

Keywords

Threshold voltage (VTH)

Levenberg-Marquardt

Short Channel Effect

Drain-Induced Barrier Lowering (DIBL)

Abstract

The threshold voltage of a MOSFET, represented by VTH, is a major parameter in the circuit design, and the lack of an accurate equation for the threshold voltage of transistors is one of the main challenges for integrated circuit designers. Based on the data obtained from the simulation, the present paper aims to investigate the effect of bias voltages (VGS, VDS, and VBS), transistor's dimensions (W and L), and temperature (T) on the value of threshold voltage, followed by the use of Levenberg-Marquardt method to propose a new equation for obtaining the threshold voltage value regarding different parameters. The obtained equation can be helpful for the design and manual calculations of the integrated circuits. Furthermore, various simulations were performed to evaluate the validity and accuracy of the obtained equation, indicating excellent consistency between the proposed equation and simulation results

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