A NOVEL AND EFFICIENT HARDWARE IMPLEMENTATION OF SCALAR POINT MULTIPLIER

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MASOUMI M.; MAHDIZADEH H.

مرکز اطلاعات علمی Scientific Information Database (SID) - Trusted Source for Research and Academic Resources

Journal Paper

Paper Information

Journal: IRANIAN JOURNAL OF ELECTRICAL AND ELECTRONIC ENGINEERING Year:2012 | Volume:8 | Issue:4 Page(s): 290-302

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Information Journal Paper

Title

A NOVEL AND EFFICIENT HARDWARE IMPLEMENTATION OF SCALAR POINT MULTIPLIER

Author(s)

MASOUMI M. | MAHDIZADEH H. | Issue Writer Certificate

Keywords

FPGA IMPLEMENTATION

LOPEZ-DAHAB ALGORITHM

SCALAR POINT MULTIPLICATION

Abstract

A new and highly efficient architecture for elliptic curve SCALAR POINT MULTIPLICATION which is optimized for the binary field recommended by NIST is presented.To achieve the maximum architectural and timing improvements we have reorganized and reordered the critical path of the Lopez-Dahab scalar point multiplier carefully such that sequentially executed operations are separated into parallel operations and operations in the critical path are diverted to noncritical paths. WithG=41, the proposed design is capable of performing a field multiplication over the extension field with degree 163 in 11.92 ms with the maximum achievable frequency of 251 MHz on Xilinx Virtex-4 (XC4VLX200) while 22% of the chip area is occupied, whereG is the digit size of the underlying digit-serial finite field multiplier.

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APA: Copy

MASOUMI, M., & MAHDIZADEH, H.. (2012). A NOVEL AND EFFICIENT HARDWARE IMPLEMENTATION OF SCALAR POINT MULTIPLIER. IRANIAN JOURNAL OF ELECTRICAL AND ELECTRONIC ENGINEERING, 8(4), 290-302. SID. https://sid.ir/paper/299874/en

Vancouver: Copy

MASOUMI M., MAHDIZADEH H.. A NOVEL AND EFFICIENT HARDWARE IMPLEMENTATION OF SCALAR POINT MULTIPLIER. IRANIAN JOURNAL OF ELECTRICAL AND ELECTRONIC ENGINEERING[Internet]. 2012;8(4):290-302. Available from: https://sid.ir/paper/299874/en

IEEE: Copy

M. MASOUMI, and H. MAHDIZADEH, “A NOVEL AND EFFICIENT HARDWARE IMPLEMENTATION OF SCALAR POINT MULTIPLIER,” IRANIAN JOURNAL OF ELECTRICAL AND ELECTRONIC ENGINEERING, vol. 8, no. 4, pp. 290–302, 2012, [Online]. Available: https://sid.ir/paper/299874/en

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