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Information Journal Paper

Title

A HIGH-SPEED HIGH-INPUT RANGE FOUR QUADRANT ANALOG MULTIPLIER

Pages

  13-17

Abstract

 In this paper, a CMOS FOUR QUADRANT MULTIPLIER based on flipped voltage follower and differential squaring circuit is presented. The proposed circuit has a compact architecture which operates at a higher speed and a higher input voltage range compared to the previously presented structures. The transistors operate in both saturation and ohmic regions. The circuit operates with a single supply voltage of 3.3V in a 0.35 μm CMOS technology where the total harmonic distortion (THD) is less than 1.1%, the linearity error is also less than 3%, -3db frequency is more than 180 MHz and the voltage input range is 3 Vp-p− . Simulation results are given to verify the functionality of the proposed multiplier.

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    Cite

    APA: Copy

    MOKARAM, M., KHOEI, A., & HADIDI, KH.. (2010). A HIGH-SPEED HIGH-INPUT RANGE FOUR QUADRANT ANALOG MULTIPLIER. MAJLESI JOURNAL OF ELECTRICAL ENGINEERING, 4(1 (12)), 13-17. SID. https://sid.ir/paper/565863/en

    Vancouver: Copy

    MOKARAM M., KHOEI A., HADIDI KH.. A HIGH-SPEED HIGH-INPUT RANGE FOUR QUADRANT ANALOG MULTIPLIER. MAJLESI JOURNAL OF ELECTRICAL ENGINEERING[Internet]. 2010;4(1 (12)):13-17. Available from: https://sid.ir/paper/565863/en

    IEEE: Copy

    M. MOKARAM, A. KHOEI, and KH. HADIDI, “A HIGH-SPEED HIGH-INPUT RANGE FOUR QUADRANT ANALOG MULTIPLIER,” MAJLESI JOURNAL OF ELECTRICAL ENGINEERING, vol. 4, no. 1 (12), pp. 13–17, 2010, [Online]. Available: https://sid.ir/paper/565863/en

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