ASIC DESIGN PROTECTION AGAINST REVERSE ENGINEERING DURING THE FABRICATION PROCESS USING AUTOMATIC NETLIST OBFUSCATION DESIGN FLOW

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ZAMANZADEH SHARAREH; JAHANIAN ALI

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Paper Information

Journal: THE ISC INTERNATIONAL JOURNAL OF INFORMATION SECURITY Year:2016 | Volume:8 | Issue:2 Page(s): 93-104

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Title

ASIC DESIGN PROTECTION AGAINST REVERSE ENGINEERING DURING THE FABRICATION PROCESS USING AUTOMATIC NETLIST OBFUSCATION DESIGN FLOW

Author(s)

ZAMANZADEH SHARAREH | JAHANIAN ALI | Issue Writer Certificate

Keywords

HARDWARE SECURITYQ2

NETLIST ENCRYPTIONQ2

OBFUSCATIONQ2

REVERSE ENGINEERINGQ2

IP PIRACYQ2

Abstract

Fab-less business model in semiconductor industry has led to serious concerns about trustworthy hardware. In untrusted foundries and manufacturing companies, submitted layout may be analyzed and reverse engineered to steal the information of a design or insert malicious Trojans. Understanding the netlist topology is the ultimate goal of the REVERSE ENGINEERING process. In this paper, we propose a NETLIST ENCRYPTION mechanism to hide the interconnect topology inside an IC. Moreover, new special standard cells (Wire Scrambling cells) are designed to play the role of NETLIST ENCRYPTION. Furthermore, a design flow is proposed to insert the WS-cells inside the netlist with the aim of maximum OBFUSCATION and minimum overhead. It is worth noting that this mechanism is fully automated with no need to detail information of the functionality and structure of the design. Our proposed mechanism is implemented in an academic physical design framework (EduCAD). Experimental results show that REVERSE ENGINEERING can be hindered considerably in cost of negligible overheads by 23% in area, 3.25% in delay and 14.5% in total wire length. REVERSE ENGINEERING is evaluated by brute-force attack, and the learned information is 0% and the Hamming distance is approximately 50%.

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APA: Copy

ZAMANZADEH, SHARAREH, & JAHANIAN, ALI. (2016). ASIC DESIGN PROTECTION AGAINST REVERSE ENGINEERING DURING THE FABRICATION PROCESS USING AUTOMATIC NETLIST OBFUSCATION DESIGN FLOW. THE ISC INTERNATIONAL JOURNAL OF INFORMATION SECURITY, 8(2 ), 93-104. SID. https://sid.ir/paper/241779/en

Vancouver: Copy

ZAMANZADEH SHARAREH, JAHANIAN ALI. ASIC DESIGN PROTECTION AGAINST REVERSE ENGINEERING DURING THE FABRICATION PROCESS USING AUTOMATIC NETLIST OBFUSCATION DESIGN FLOW. THE ISC INTERNATIONAL JOURNAL OF INFORMATION SECURITY[Internet]. 2016;8(2 ):93-104. Available from: https://sid.ir/paper/241779/en

IEEE: Copy

SHARAREH ZAMANZADEH, and ALI JAHANIAN, “ASIC DESIGN PROTECTION AGAINST REVERSE ENGINEERING DURING THE FABRICATION PROCESS USING AUTOMATIC NETLIST OBFUSCATION DESIGN FLOW,” THE ISC INTERNATIONAL JOURNAL OF INFORMATION SECURITY, vol. 8, no. 2 , pp. 93–104, 2016, [Online]. Available: https://sid.ir/paper/241779/en

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