SCALABLE CACHING TECHNIQUES FOR A WEAKLY COHERENT MEMORY

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ZAMANIFAR K.; NASH J.M.; DEW P.M.

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Journal Paper

Paper Information

Journal: IRANIAN JOURNAL OF SCIENCE AND TECHNOLOGY TRANSACTION B- ENGINEERING Year:2001 | Volume:25 | Issue:B3 Page(s): 0-0

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Information Journal Paper

Title

SCALABLE CACHING TECHNIQUES FOR A WEAKLY COHERENT MEMORY

Author(s)

ZAMANIFAR K. | NASH J.M. | DEW P.M.

Keywords

COMPUTATIONAL MODELS

CACHING

WEAK COHERENCY

PARALLEL ALGORITHMS

Abstract

There is a growing acceptance that general purpose parallel computing requires
the use of a scalable shared memory environment. The Cray T3D, IBM SP2 and Intel Paragon
message passing machines support a scalable interconnect for up to 100´s or 1000´s of
processors, with linear increases in bisection bandwidth as the number of processors grow.
Supporting a shared address space on these machines results in a two-level memory
hierarchy, in which data are either local or shared across the machine. The next few years will
see a trend towards cache coherent multiprocessors, using the techniques employed by
machines such as the KSR (cach-only memory) and the DASH (distributed directories). This
will simplify the programming model by processoring a single level memory hierarchy.
This paper describes a highly scalable CACHING technique, which is targeted at a weakly
coherent form of shared memory, supported by the WPRAM computational model. (A
processor wishing to read newly written shared data must explicitly synchronize in some way
with the writer of that data). The example provides supports coherency for barrier
synchronisation operation, but can be extended to other forms. A case study using the simplex
method for linear programming is given. Results are based on a simulation of a scalable
distributed memory machine.

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APA: Copy

ZAMANIFAR, K., NASH, J.M., & DEW, P.M.. (2001). SCALABLE CACHING TECHNIQUES FOR A WEAKLY COHERENT MEMORY. IRANIAN JOURNAL OF SCIENCE AND TECHNOLOGY TRANSACTION B- ENGINEERING, 25(B3), 0-0. SID. https://sid.ir/paper/529202/en

Vancouver: Copy

ZAMANIFAR K., NASH J.M., DEW P.M.. SCALABLE CACHING TECHNIQUES FOR A WEAKLY COHERENT MEMORY. IRANIAN JOURNAL OF SCIENCE AND TECHNOLOGY TRANSACTION B- ENGINEERING[Internet]. 2001;25(B3):0-0. Available from: https://sid.ir/paper/529202/en

IEEE: Copy

K. ZAMANIFAR, J.M. NASH, and P.M. DEW, “SCALABLE CACHING TECHNIQUES FOR A WEAKLY COHERENT MEMORY,” IRANIAN JOURNAL OF SCIENCE AND TECHNOLOGY TRANSACTION B- ENGINEERING, vol. 25, no. B3, pp. 0–0, 2001, [Online]. Available: https://sid.ir/paper/529202/en

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