Information Journal Paper
APA:
CopyWU, A.N., & CHAN, T.S.. (1998). COST - EFFICIENT PARALLEL LATTICE VLSI ARCHITECTURE FOR THE IFFT/FFT IN DMT TRANSCEIVER TECHNOLOGY. PROCEEDING OF IEEE INTERNATIONAL CONFERENCE ON ACOUSTICS SPEECH, AND SIGNAL PROCESSING (ICASSP), 6(-), 3517-3520. SID. https://sid.ir/paper/544295/en
Vancouver:
CopyWU A.N., CHAN T.S.. COST - EFFICIENT PARALLEL LATTICE VLSI ARCHITECTURE FOR THE IFFT/FFT IN DMT TRANSCEIVER TECHNOLOGY. PROCEEDING OF IEEE INTERNATIONAL CONFERENCE ON ACOUSTICS SPEECH, AND SIGNAL PROCESSING (ICASSP)[Internet]. 1998;6(-):3517-3520. Available from: https://sid.ir/paper/544295/en
IEEE:
CopyA.N. WU, and T.S. CHAN, “COST - EFFICIENT PARALLEL LATTICE VLSI ARCHITECTURE FOR THE IFFT/FFT IN DMT TRANSCEIVER TECHNOLOGY,” PROCEEDING OF IEEE INTERNATIONAL CONFERENCE ON ACOUSTICS SPEECH, AND SIGNAL PROCESSING (ICASSP), vol. 6, no. -, pp. 3517–3520, 1998, [Online]. Available: https://sid.ir/paper/544295/en