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Information Journal Paper

Title

A 0.4V, 790 μW CMOS LOW NOISE AMPLIFIER IN THE SUB-THRESHOLD REGION AT 1.5 GHZ

Pages

  11-16

Abstract

 A fully integrated low-noise amplifier (LNA) with 0.4V supply voltage and ultra-low power consumption at 1.5 GHz by FOLDED CASCODE STRUCTURE is presented. The proposed LNA is designed in a TSMC 0.18 mm CMOS technology, in which the all transistors are biased in sub-threshold region. Through the use of the proposed circuit for the gain enhancement in this structure and using FORWARD BODY BIAS technique, a very high figure of merit is achieved, in comparison to the similar structures. The LNA provides a power gain of 14.7 bB with a noise figure of 2.9dB while consuming only 790 mW dc power. Also, the impedance matching of the input and output circuit in its operating frequency is desirable and in the whole circuit bandwidth, input and output isolation is below -33 dB.

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  • Cite

    APA: Copy

    ZAFARIAN, AMIN, KALALI FARD, IRAJ, GOLMAKANI, ABBAS, & SHIRAZI, JALIL. (2013). A 0.4V, 790 μW CMOS LOW NOISE AMPLIFIER IN THE SUB-THRESHOLD REGION AT 1.5 GHZ. MAJLESI JOURNAL OF ELECTRICAL ENGINEERING, 7(4 (27)), 11-16. SID. https://sid.ir/paper/626364/en

    Vancouver: Copy

    ZAFARIAN AMIN, KALALI FARD IRAJ, GOLMAKANI ABBAS, SHIRAZI JALIL. A 0.4V, 790 μW CMOS LOW NOISE AMPLIFIER IN THE SUB-THRESHOLD REGION AT 1.5 GHZ. MAJLESI JOURNAL OF ELECTRICAL ENGINEERING[Internet]. 2013;7(4 (27)):11-16. Available from: https://sid.ir/paper/626364/en

    IEEE: Copy

    AMIN ZAFARIAN, IRAJ KALALI FARD, ABBAS GOLMAKANI, and JALIL SHIRAZI, “A 0.4V, 790 μW CMOS LOW NOISE AMPLIFIER IN THE SUB-THRESHOLD REGION AT 1.5 GHZ,” MAJLESI JOURNAL OF ELECTRICAL ENGINEERING, vol. 7, no. 4 (27), pp. 11–16, 2013, [Online]. Available: https://sid.ir/paper/626364/en

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