Archive

Year

Volume(Issue)

Issues

مرکز اطلاعات علمی SID1
Scientific Information Database (SID) - Trusted Source for Research and Academic Resources
Scientific Information Database (SID) - Trusted Source for Research and Academic Resources
Scientific Information Database (SID) - Trusted Source for Research and Academic Resources
Scientific Information Database (SID) - Trusted Source for Research and Academic Resources
Scientific Information Database (SID) - Trusted Source for Research and Academic Resources
Scientific Information Database (SID) - Trusted Source for Research and Academic Resources
Scientific Information Database (SID) - Trusted Source for Research and Academic Resources
Scientific Information Database (SID) - Trusted Source for Research and Academic Resources
Issue Info: 
  • Year: 

    2007
  • Volume: 

    5
  • Issue: 

    3 (A)
  • Pages: 

    1-11
Measures: 
  • Citations: 

    0
  • Views: 

    760
  • Downloads: 

    0
Abstract: 

Bus based communication structures play a key role in communicating between components of high density chips such as System-on-Chip (SOC) and Network-on-Chip (NOC). Many static faults such as open circuit, short circuit, stuck-at and combination of them, and also such as crosstalk faults might occur in chip's bus-based communication structures during chip manufacture or in the normal operation of them. Former needs dedicated tests and the latter needs at-speed tests. In this paper we have exploited a systematic method to extract test patterns for both of static and crosstalk fault types, and proposed a very suitable solution for testing of chips' buses through designing an at-speed test pattern generator for each of fault types with low area overhead.

Yearly Impact: مرکز اطلاعات علمی Scientific Information Database (SID) - Trusted Source for Research and Academic Resources

View 760

مرکز اطلاعات علمی Scientific Information Database (SID) - Trusted Source for Research and Academic ResourcesDownload 0 مرکز اطلاعات علمی Scientific Information Database (SID) - Trusted Source for Research and Academic ResourcesCitation 0 مرکز اطلاعات علمی Scientific Information Database (SID) - Trusted Source for Research and Academic ResourcesRefrence 0
Issue Info: 
  • Year: 

    2007
  • Volume: 

    5
  • Issue: 

    3 (A)
  • Pages: 

    12-22
Measures: 
  • Citations: 

    0
  • Views: 

    886
  • Downloads: 

    381
Abstract: 

Buffer insertion plays an important role in circuit performance and signal integrity especially in deep submicron technologies. The stage at which buffers are inserted in a design has a large impact on the design quality. Early buffer insertion may cause mis-estimation due to unknown cell locations whereas buffer insertion after placement may not be very effective because the cell locations have been fixed and buffer resources may be distributed inappropriately. In this paper, a buffer planning algorithm for floor-placement design flow is presented. This algorithm creates a map of buffer requirements in various regions of the design at the floorplanning stage and then enforces the detailed placer to distribute white spaces with respect to the estimated buffer requirement map. Experimental results show that the proposed method improves the performance of attempted circuits with fewer buffers. Furthermore, results show that congestion, routability and design convergence are improved and the auxiliary loops are avoided in the proposed design flow. Our analyses and experiments show that the CPU time overhead of this algorithm is very small.

Yearly Impact: مرکز اطلاعات علمی Scientific Information Database (SID) - Trusted Source for Research and Academic Resources

View 886

مرکز اطلاعات علمی Scientific Information Database (SID) - Trusted Source for Research and Academic ResourcesDownload 381 مرکز اطلاعات علمی Scientific Information Database (SID) - Trusted Source for Research and Academic ResourcesCitation 0 مرکز اطلاعات علمی Scientific Information Database (SID) - Trusted Source for Research and Academic ResourcesRefrence 0
Issue Info: 
  • Year: 

    2007
  • Volume: 

    5
  • Issue: 

    3 (A)
  • Pages: 

    23-34
Measures: 
  • Citations: 

    0
  • Views: 

    3446
  • Downloads: 

    0
Abstract: 

The multiple instance learning problem is getting more attention recently in the field of machine learning. In multiple instance learning, the training set comprises labeled bags that are composed of unlabeled instances, and the task is to predict the labels of unseen bags through analyzing the training bags with known labels. In this paper, we proposed a two-phase method for solving the multiple instance learning problem. Two phases of our method are independent of each other and therefore the proposed method has a high flexibility for future optimization and extension. The proposed method can discover the specific concept pattern using only a few training samples. This method presents the learned concept as a hypercube in an n dimensional feature space. We compare our proposed method with other existing algorithms using the Musk data, which is a popularly used real-world benchmark for multiple instance learners. The result of experiments shows the validity of the proposed method. Moreover, we provide the experimental results on image classification problem. Accuracy is evaluated and the effectiveness of the proposed method has been shown through comparative studies.

Yearly Impact: مرکز اطلاعات علمی Scientific Information Database (SID) - Trusted Source for Research and Academic Resources

View 3446

مرکز اطلاعات علمی Scientific Information Database (SID) - Trusted Source for Research and Academic ResourcesDownload 0 مرکز اطلاعات علمی Scientific Information Database (SID) - Trusted Source for Research and Academic ResourcesCitation 0 مرکز اطلاعات علمی Scientific Information Database (SID) - Trusted Source for Research and Academic ResourcesRefrence 0
Issue Info: 
  • Year: 

    2007
  • Volume: 

    5
  • Issue: 

    3 (A)
  • Pages: 

    35-40
Measures: 
  • Citations: 

    0
  • Views: 

    920
  • Downloads: 

    381
Abstract: 

Encryption or scrambling of audio data is not enough for controlling access to them, and Watermarking methods should be used for prevention of their unauthorized distribution and thereby preserving rights of their creators. These methods enable controlling copy of audio files and also tracing copied files by hiding Copyright information in audio file. Watermarking MP3-compressed files in Web requires a special kind of watermarking that inserts copyright data directly into bit-stream of MP3 audio. In this paper, a novel technique proposed for watermarking MP3-compressed audio data. Direct extraction of watermark data from compressed file and also non-susceptibility to asynchronous MP3 frames in Watermark Embedder and Extractor, are among the significant features of the proposed system in comparison to similar methods.

Yearly Impact: مرکز اطلاعات علمی Scientific Information Database (SID) - Trusted Source for Research and Academic Resources

View 920

مرکز اطلاعات علمی Scientific Information Database (SID) - Trusted Source for Research and Academic ResourcesDownload 381 مرکز اطلاعات علمی Scientific Information Database (SID) - Trusted Source for Research and Academic ResourcesCitation 0 مرکز اطلاعات علمی Scientific Information Database (SID) - Trusted Source for Research and Academic ResourcesRefrence 0
Issue Info: 
  • Year: 

    2007
  • Volume: 

    5
  • Issue: 

    3 (A)
  • Pages: 

    41-55
Measures: 
  • Citations: 

    0
  • Views: 

    711
  • Downloads: 

    0
Abstract: 

Since, the characteristics of VLSI basic circuits like XOR/XNOR which are the result of single cell simulation setup, are not necessarily defining their behavior in multistage circuits, so reaching to different test methods and more suitable patterns are important issues for investigators in this field. In this paper a new method is proposed in which timing behavior of different circuits can be determined and compared so the result can be used in different structure configurations and large scale circuits. In addition to the new algorithm for designing XOR/XNOR balance circuits, two more new circuits have been proposed. By simulation tool, HSPICE, first sizing transistor due to PDP characteristics for circuits has been done and then their timing behaviors have been compared. The optimal circuit due to timing behavior is one of the novel methods. Simulations have been done by 0.18mm tmtechnology on the base of BS2M3v model.

Yearly Impact: مرکز اطلاعات علمی Scientific Information Database (SID) - Trusted Source for Research and Academic Resources

View 711

مرکز اطلاعات علمی Scientific Information Database (SID) - Trusted Source for Research and Academic ResourcesDownload 0 مرکز اطلاعات علمی Scientific Information Database (SID) - Trusted Source for Research and Academic ResourcesCitation 0 مرکز اطلاعات علمی Scientific Information Database (SID) - Trusted Source for Research and Academic ResourcesRefrence 0