مرکز اطلاعات علمی Scientific Information Database (SID) - Trusted Source for Research and Academic Resources

Persian Verion

مرکز اطلاعات علمی Scientific Information Database (SID) - Trusted Source for Research and Academic Resources

video

مرکز اطلاعات علمی Scientific Information Database (SID) - Trusted Source for Research and Academic Resources

sound

مرکز اطلاعات علمی Scientific Information Database (SID) - Trusted Source for Research and Academic Resources

Persian Version

مرکز اطلاعات علمی Scientific Information Database (SID) - Trusted Source for Research and Academic Resources

View:

485
مرکز اطلاعات علمی Scientific Information Database (SID) - Trusted Source for Research and Academic Resources

Download:

0
مرکز اطلاعات علمی Scientific Information Database (SID) - Trusted Source for Research and Academic Resources

Cites:

Information Journal Paper

Title

Design of an analog current-mode time-delay cell

Pages

  129-138

Abstract

 The goal of this research is designing an Analog current-mode time-delay cell based on a current-mode first-order all-pass filter with high output impedance. The proposed all-pass filter as a time-delay cell consists of a class AB cascode current mirror and also a differential input voltage current conveyor (DVCC) as an active element employing only two grounded passive components for phase shifting and required time delay. The proposed time-delay cell is capable of working at low-voltage headroom and has high speed operation and a low-power consumption of 1. 39mW. The value of delay can be controlled by both fine-tuning and coarse-tuning. This time-delay cell can generate a delay of 14ns while it is able to reach a minimum delay of 6ns across a 100MHz bandwidth by using fine-tuning and coarse-tuning of the time-delay cell, as well. The proposed cell can be used in the beamforming, radars, and medical engineering. HSPICE simulations are performed based on a 0. 18µ m standard CMOS technology.

Cites

  • No record.
  • References

  • No record.
  • Cite

    APA: Copy

    Aghazadeh, Seyed Rasoul, & Saberkari, Alireza. (2017). Design of an analog current-mode time-delay cell. ELECTRONIC INDUSTRIES, 8(2 ), 129-138. SID. https://sid.ir/paper/229623/en

    Vancouver: Copy

    Aghazadeh Seyed Rasoul, Saberkari Alireza. Design of an analog current-mode time-delay cell. ELECTRONIC INDUSTRIES[Internet]. 2017;8(2 ):129-138. Available from: https://sid.ir/paper/229623/en

    IEEE: Copy

    Seyed Rasoul Aghazadeh, and Alireza Saberkari, “Design of an analog current-mode time-delay cell,” ELECTRONIC INDUSTRIES, vol. 8, no. 2 , pp. 129–138, 2017, [Online]. Available: https://sid.ir/paper/229623/en

    Related Journal Papers

    Related Seminar Papers

  • No record.
  • Related Plans

  • No record.
  • Recommended Workshops






    Move to top
    telegram sharing button
    whatsapp sharing button
    linkedin sharing button
    twitter sharing button
    email sharing button
    email sharing button
    email sharing button
    sharethis sharing button