OPTIMIZED REVERSIBLE PROGRAMMABLE LOGIC ARRAY (PLA)

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NIKNAFAS ALIAKBAR

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Journal Paper

Paper Information

Journal: JOURNAL OF ADVANCES IN COMPUTER RESEARCH Year:2013 | Volume:4 | Issue:1 (11) Page(s): 81-88

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Information Journal Paper

Title

OPTIMIZED REVERSIBLE PROGRAMMABLE LOGIC ARRAY (PLA)

Author(s)

NIKNAFAS ALIAKBAR | Issue Writer Certificate

Keywords

OPTIMIZATION

REVERSIBLE LOGIC

PLA

GENETIC ALGORITHM

Abstract

Reversible logic circuits have found emerging attentions in nanotechnology, optical computing, quantum computing and low power design. A programmable logic array (PLA) is a universal circuit which is used to implement combinational logic circuits. The main part of a PLA is its AND array. In this study we propose two types of optimized reversible programmable logic array (RPLA) circuits. The first type is based on a “2-to-4” AND array, and is proposed for the first time. The second type is based on a “3-to-8” AND array. For each type, we bring some different designs. These circuits are compared with the existing counterparts in terms of number of constant inputs and garbage outputs, delay and the quantum cost and are shown that all parameters in proposed circuits are improved.

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APA: Copy

NIKNAFAS, ALIAKBAR. (2013). OPTIMIZED REVERSIBLE PROGRAMMABLE LOGIC ARRAY (PLA). JOURNAL OF ADVANCES IN COMPUTER RESEARCH, 4(1 (11)), 81-88. SID. https://sid.ir/paper/328725/en

Vancouver: Copy

NIKNAFAS ALIAKBAR. OPTIMIZED REVERSIBLE PROGRAMMABLE LOGIC ARRAY (PLA). JOURNAL OF ADVANCES IN COMPUTER RESEARCH[Internet]. 2013;4(1 (11)):81-88. Available from: https://sid.ir/paper/328725/en

IEEE: Copy

ALIAKBAR NIKNAFAS, “OPTIMIZED REVERSIBLE PROGRAMMABLE LOGIC ARRAY (PLA),” JOURNAL OF ADVANCES IN COMPUTER RESEARCH, vol. 4, no. 1 (11), pp. 81–88, 2013, [Online]. Available: https://sid.ir/paper/328725/en

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