Design and Production of Hardware Authentication Code Using Physically Unclonable Functions and a Random Number Generator on FPGA

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MASOUMI M.; DEHGHAN A.; MADADI E.

مرکز اطلاعات علمی Scientific Information Database (SID) - Trusted Source for Research and Academic Resources

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Paper Information

Journal: JOURNAL OF ELECTRONIC AND CYBER DEFENCE Year:2020 | Volume:7 | Issue:4 Page(s): 37-50

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Title

Design and Production of Hardware Authentication Code Using Physically Unclonable Functions and a Random Number Generator on FPGA

Author(s)

MASOUMI M. | DEHGHAN A. | MADADI E. | Issue Writer Certificate

Keywords

Hardware securityQ1

Physically unclonable functionQ1

Random number generatorQ1

FPGA ImplementationQ1

Abstract

One of the most challenging issues in the field of Hardware security is to protect the hardware from reverse engineering, counterfeiting and cloning. Using Physically unclonable functions (PUFs) is among the most efficient ways to improve security against these kinds of threats. In this work, we used a multiplexer-based or the so-called arbiter PUF to improve resilience of FPGAs from Xilinx family against these types of compromises. At first, a 32-bit random code was generated as the initial seed for a linear feedback shift register (LFSR). Then, a 64-bit unique authentication code was generated by XORing the outputs of the shift register and outputs of a ring oscillator-based Random number generator and passing out the result from the Von Neumann corrector. The scheme is implemented in such a way that the generated code is robust against reverse engineering or modeling, and therefore is unrecoverable. The implementation results, on Side-Channel Attack User Reference Architecture (SAKURA G-II) which includes XC6SLX75 demonstrated that the design utilizes almost 15% of FPGA resources to generate a 64-bit unique authentication code.

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APA: Copy

MASOUMI, M., DEHGHAN, A., & MADADI, E.. (2020). Design and Production of Hardware Authentication Code Using Physically Unclonable Functions and a Random Number Generator on FPGA. JOURNAL OF ELECTRONIC AND CYBER DEFENCE, 7(4 ), 37-50. SID. https://sid.ir/paper/395723/en

Vancouver: Copy

MASOUMI M., DEHGHAN A., MADADI E.. Design and Production of Hardware Authentication Code Using Physically Unclonable Functions and a Random Number Generator on FPGA. JOURNAL OF ELECTRONIC AND CYBER DEFENCE[Internet]. 2020;7(4 ):37-50. Available from: https://sid.ir/paper/395723/en

IEEE: Copy

M. MASOUMI, A. DEHGHAN, and E. MADADI, “Design and Production of Hardware Authentication Code Using Physically Unclonable Functions and a Random Number Generator on FPGA,” JOURNAL OF ELECTRONIC AND CYBER DEFENCE, vol. 7, no. 4 , pp. 37–50, 2020, [Online]. Available: https://sid.ir/paper/395723/en

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