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Cites:

Information Journal Paper

Title

CMOS Image Sensor with 10-Bit Two-Stage Column-Parallel Data Converter

Pages

  81-92

Abstract

 In this paper, an image sensor is introduced which can take photos at high-speed. For this purpose, a Pixel readout circuit has been introduced. So that with the same power consumption of the conventional source follower circuit, linearity and accuracy are improved 14dB and 16%, respectively. Total input referred noise of the Pixel readout circuit in the band width of 1hz-1GHz is 0. 7mv and power consumption without bias circuit is 16. 9µ w. The proposed image sensor is designed based on the column-parallel architecture, and a new structure has been introduced to convert Pixel analog signals to digital, which can convert Pixels signals to 10 bits digital data in two consecutive phases. This method has led to 16 times increase in sampling rate without significantly increasing power consumption compared to a conventional single-slope ADC. All circuits are designed in TSMC 0. 18µ m CMOS technology and implemented by Cadence software and simulated by the Spectre circuit simulator.

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  • Cite

    APA: Copy

    Teymouri, Masood. (2021). CMOS Image Sensor with 10-Bit Two-Stage Column-Parallel Data Converter. ELECTRONIC INDUSTRIES, 12(1 ), 81-92. SID. https://sid.ir/paper/961297/en

    Vancouver: Copy

    Teymouri Masood. CMOS Image Sensor with 10-Bit Two-Stage Column-Parallel Data Converter. ELECTRONIC INDUSTRIES[Internet]. 2021;12(1 ):81-92. Available from: https://sid.ir/paper/961297/en

    IEEE: Copy

    Masood Teymouri, “CMOS Image Sensor with 10-Bit Two-Stage Column-Parallel Data Converter,” ELECTRONIC INDUSTRIES, vol. 12, no. 1 , pp. 81–92, 2021, [Online]. Available: https://sid.ir/paper/961297/en

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