In this paper the design of new high-speed current mode BiCMOS logic circuits is proposed. By altering the threshold detector circuit of the conventional current mode logic circuits and applying the multiple value logic (MVL) approach the number of transistors in basic logic operators are significantly reduced and hence a reduction of chip area and power dissipation as well as an increase in speed is achieved. Simulation with HSpice using BSIM 3V3 model and experimental 65nm BiCMOS technology were carried out for speed, and power consumption considerations at different supply voltage levels. Finally the performance of the proposed circuit is compared to an 8 bit voltage mode adder.

In this paper regarding the fact that the collector current and therefore Base current are needed for a very short time, in order to drive large capacitive load, using BiCMOS technology, we have used the existing capacitor between source and gate of MOS transistors to do so. This method has increased the speed of the circuit in comparison to its similar circuits, and it needs very low static power dissipation. In this design, remarkable reduction of the number of transistors has lead to a significant improvement in chip area.

Fully integrated voltage-controlled oscillator (VCO) is one of the most important blocks in the implementation of a single chip in today's wireless communication system. In this paper design and analysis of the ultra wideband and low phase noise linear LC VCO with low current consumption is presented. The MOS varactor is used to realize a wide tuning range. The phase noise level of the VCO is  -117.381 dBc/Hz at 1MHz offset and -127.2 dBc/Hz at 3 MHz offset. The Kvco ratio is about 1.24 GHz/V. The proposed topology gives a linear wide tuning range from 4.29 GHz to 5.29 GHz. Considering a 3.2V supply voltage the DC current consumption is about 3.13 mA and FOM of the proposed VCO is -187.5. This is the significant advantage of this circuit over previous works.

In this paper after studying and analyzing BiCMOS and CMOS logical gates, we have achieved some advanced BiCMOS circuits for the same logical gates. In all of our designs, we used threshold detectors and voltage to current converters. In this new method, some parts of the conventional BiCMOS current-mode circuits have been eliminated without any changes in the logical functionality of the circuits, and some optimum circuits based on this logic family have been introduced. In the proposed circuits, we have obtained considerable speed gain and a remarkable reduction in transistor count.