Representation of double material gate hetero-structure junctionless tunnel field effect transistor for analog and digital applications

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Aghandeh Hadi; SEDIGH ZIABARI SEYED ALI

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Journal: ELECTRONIC INDUSTRIES Year:2018 | Volume:8 | Issue:4 Page(s): 77-86

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Information Journal Paper

Title

Representation of double material gate hetero-structure junctionless tunnel field effect transistor for analog and digital applications

Author(s)

Aghandeh Hadi | SEDIGH ZIABARI SEYED ALI | Issue Writer Certificate

Keywords

Junctionless tunnel FET (JLTFET)Q1

subthreshold slopeQ1

threshold voltageQ1

double material gate (DMG)Q1

hetero-structureQ1

cut-off frequencyQ1

Abstract

In this paper, we simulate junctionless tunnel field effect transistor (JLTFET) by Silvaco Atlas. Two devices which utilize double material gate (DMG) and heterostructure (H) ideas are simulated and investigated. We propose double material gate hetero-structure JLTFET (DMG-H-JLTFET) using these two ideas. These devices have discussed at ON and OFF state with energy band diagram. Simulation results show that DMG-H-JLTFET has a larger ON current, a smaller subthreshold slope, a larger ION/IOFF and smaller threshold voltage as compared with other devices. Furthermore, we calculated the transconductance and the cut-off frequency with respect to gate voltage for these devices, which indicates that performance of proposed device is superior. Hence, DMG-H-JLTFET is suitable for analog and digital applications.

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APA: Copy

Aghandeh, Hadi, & SEDIGH ZIABARI, SEYED ALI. (2018). Representation of double material gate hetero-structure junctionless tunnel field effect transistor for analog and digital applications. ELECTRONIC INDUSTRIES, 8(4 ), 77-86. SID. https://sid.ir/paper/229615/en

Vancouver: Copy

Aghandeh Hadi, SEDIGH ZIABARI SEYED ALI. Representation of double material gate hetero-structure junctionless tunnel field effect transistor for analog and digital applications. ELECTRONIC INDUSTRIES[Internet]. 2018;8(4 ):77-86. Available from: https://sid.ir/paper/229615/en

IEEE: Copy

Hadi Aghandeh, and SEYED ALI SEDIGH ZIABARI, “Representation of double material gate hetero-structure junctionless tunnel field effect transistor for analog and digital applications,” ELECTRONIC INDUSTRIES, vol. 8, no. 4 , pp. 77–86, 2018, [Online]. Available: https://sid.ir/paper/229615/en

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